High resolution metal oxide semiconductor (MOS) integrated circuit data acquisition systems such as digital-to-analog converters require sample-and-hold circuits with input voltage offsets in the low microvolt range and gain accuracy better than 0.01%. Such sample-and-hold circuits comprise a differential amplifier which has an inherent offset between its positive and negative input, giving rise to a permanent offset output voltage which is present even in the absence of an input signal, a significant disadvantage. Conventional techniques for minimizing the output offset voltage require the use of a large, off-chip, compensating capacitor to achieve the required levels of performance.
One conventional technique for minimizing the offset output voltage of a differential amplifier is to store the initial amplifier output offset voltage on the compensating capacitor by connecting the capacitor between the amplifier output and ground. Thereafter, the compensating capacitor is connected between the negative input of the differential amplifier and the output, so that a voltage having the same magnitude and opposite polarity as the amplifier output offset voltage is applied as negative feedback to the amplifier, thus approximately cancelling the offset output voltage of the amplifier. This technique is sometimes referred to as auto-zeroing.
Unfortunately, conventional auto-zeroing suffers from the limitation that the parasitic capacitance between the negative differential amplifier input and ground is charged during the reconnection of the compensating capacitor, which induces a gain inaccuracy in the amplifier output proportional to the parasitic capacitance at the amplifier input divided by the sum of the parasitic capacitance and the capacitance of the compensating capacitor. Accordingly, in order to maintain 0.01% gain accuracy, the capacitance of the compensating capacitor must be on the order of 1,000 pF, which is too large to be included on the integrated circuit, a significant disadvantage.
Another conventional auto-zeroing technique is to first store the offset voltage on the compensating capacitor in the manner previously described, but, instead of connecting the capacitor as an element in the negative feedback loop of the amplifier, the compensating capacitor is instead connected between the positive amplifier input and ground, after which the input signal is applied to the negative differential amplifier input so that the amplifier functions as a negative gain inverting stage. This latter auto-zeroing technique suffers from the disadvantage that the amplifier offset output voltage is not quite zeroed, the offset output voltage merely having been reduced by a factor proportional to the parasitic capacitance at the positive amplifier input divided by the sum of the parasitic capacitance and the capacitance of the compensating capacitor. Accordingly, a very large compensating capacitor must be used in both autozeroing techniques described here in order minimize gain inaccuracies in the first technique or minimize offset output voltages in the second technique, a significant disadvantage.